The present invention relates to low voltage DC power supply circuits. The invention more particularly, although not exclusively, relates to dual-capacitor-based AC line frequency supply circuits for low voltage DC power.
Prior art low power off-line AC-DC power supplies are shown in FIGS. 1-7. FIG. 1 shows a low voltage DC that is obtained by a resistor and voltage clamping device. A circuit using a typical implementation of a linear shunt regulator, such as this method, is simple in design and low cost. However, the circuit suffers from a number of drawbacks. There is a large power loss in the resistor R1. A typical loss is 220V×15 mA=3.3 W; (where Iout=10 mA and IZener diode=5 mA). The resistor and voltage clamping device also exhibit low efficiency, poor thermal performance regarding power loss handling, and poor line and load regulation.
FIG. 2 shows a high voltage (“HV”) input linear shunt regulator. Compared to the circuit of FIG. 1, the HV input linear shunt regulator circuit gives a better voltage regulation at Vout. However, the HV circuit suffers from similar disadvantages to the resistor and voltage clamping device depicted in FIG. 1. Specifically, the HV input linear shunt regulator circuit suffers from high power loss in the series pass transistor, poor thermal performance, and needs a high voltage device as the series pass transistor.
FIG. 3 shows a current source tied from a high-voltage rectified DC (Vrect). The circuit for this method may reduce the power loss compared to the circuit in FIG. 1, but the current source must be a high-voltage device. This increases the cost of implementation. The inherent V-I loss on the current source itself is also still significant.
FIG. 4 shows a HV current source that supplies the start-up current with an auxiliary coil that supplies the operating current. The depicted controller has a built-in oscillator to drive the inductor to provide the appropriate DC voltage through the auxiliary coil. This circuit is undesirable because the current source must be operating at high voltage and the circuit itself is more complex. The transformer required to attain the appropriate DC voltage is expensive and there is poor EMI performance.
FIG. 5 shows a low-power switching mode power supply (“SMPS”). A low-power SMPS may be used to supply the DC output voltage to the load. However, the power loss overhead for the SMPS is very high if it is supposed to deliver only 10 mA 5 V to the load. This results in a low efficiency circuit with poor EMI performance and there is audio noise as well.
FIG. 6A shows a one-sided AC charge pump circuit connected to either LIVE or NEUTRAL lines. It is comprised of C3, C4, D5, D6 and a voltage clamping device. When V(neutral) is going up, C4 is charged and pumped to C3 via D5 as VC voltage which is clamped by the voltage clamping device. When V(neutral) is going down, C4 is discharged to the load through the discharging path. At the same time, a flatter voltage can be obtained at VC by smoothing VD with C3 and D5. By connecting VC to a regulator, we may easily get a DC output at Vout to drive a controller circuit.
Referring to FIG. 6B, under the case of normal load R1 on the Vrect line, C4 is fully discharged, and V(neutral) will reach 0 V during the AC cycle. In such case, Vrect will look like a rectified AC voltage which peak is about 220 V*1.414=310 V.
The advantages of this circuit are that it is a simple design that is low in cost. There are no inductors and there is a good line harmonic current. The circuit also results in relatively low power loss.
However, if there is only light load R1 on the Vrect line, the voltage of C4 will not be fully discharged to 0 V during the AC cycle as shown in FIG. 6C, and it will store the peak AC voltage (about 300 V) in C4. On top of this, Vrect will be built up to a peak of 600 V+(or the peak-to-peak AC voltage at maximum). It may cause breakdown to the device attached to Vrect line (e.g. HV capacitor, MOS switching device, etc.). As there is only a small ripple on V(neutral) relative to GND, it is not sufficient to pump up the voltage at VC. Hence, the circuit cannot operate properly under the light load condition. This is mainly caused by the imbalance condition of the main rectifying bridge on the LIVE or NEUTRAL lines.
FIG. 7A shows a one-sided AC charge pump on a Vrect line with extra resistance for standby power. To cater to the imbalance issue, the one-sided AC charge pump input may be connected directly to the Vrect line that will have sufficient ripple to charge C4 and pump C3 to the desirable voltage at VC (see waveforms depicted in FIG. 7B). As it is in balanced condition, the Vrect peak will only be the peak of the AC voltage (e.g. 220 V×1.414=310 V at maximum)
However, at light load condition, the ripple may not be high enough for the AC charge-pump action. So the Vrect line requires loading by R1 to dissipate the minimum power so as to maintain the minimum ripple in order to ensure the charge-pump action. Otherwise, VC will not reach the desirable voltage level. As a result, some minimum power is dissipated in R1, so it will reduce the overall efficiency.